RTSS 2020

Workshop on Mixed Criticality Systems (WMC)

8th International Workshop on Mixed Criticality Systems at the Real Time Systems Symposium (RTSS 2020)

Keynote

We are very excited to announce that Prof. Iain Bate from the University of York will give a keynote talk entitled:

Justifying the Service Provided to Low-Criticality Tasks in an Avionic Mixed-Criticality System

Abstract. Significant work has been presented over the last decade looking at the application of Mixed Criticality Scheduling. The premise being that if a failure occurs the scheduler performs a mode change from normal mode to high-criticality mode. In high-criticality mode, some lower-criticality tasks are given a reduced service (e.g. not executed or executed at a different period). Recently work has been performed to bound the number of low-criticality jobs that might be skipped when the scheduler changes to high-criticality mode. However, a significant gap in the analysis has appeared with respect to identifying for how long the service provided to lower-criticality tasks may be reduced. This is essential as part of supporting software certification. In this talk, real world requirements for low-criticality software, and a process designed to allow a system integrator to address this gap will be introduced. The result is a safety argument with supporting evidence based on a real life case study, taken from a DAL-A certified aircraft engine control system.

Bio. Iain Bate is a Reader in Real-Time Systems within the Department of Computer Science at the University of York. His research interests include scheduling and timing analysis, and the design and certification of Cyber-Physical Systems. He has chaired three leading International Conferences and is a frequent member of Program Committees. He was the Editor-in-Chief of the Microprocessors and Microsystems journal and then the Journal of Systems Architecture for 15 years. He is currently leading the timing work package of a large government-funded project. The work package is investigating the use of mixed-criticality scheduling and multi-core processors in avionics systems. The project involves most of the UK companies that develop avionic systems.

Purpose of the Workshop

WMC’s goal is to promote sharing of new ideas, results, experiences, and information about research and development of mixed-criticality real-time systems.

The workshop aims to bring together researchers working in fields relating to real-time systems with a focus on the challenges brought about by the integration of mixed-criticality applications onto singlecore, multicore, and manycore architectures. These challenges are cross-cutting.

To advance rapidly, closer interaction is needed between the sub-communities involved in real-time scheduling, real-time operating systems / runtime environments, and timing analysis. The workshop aims to promote understanding of the fundamental problems that affect Mixed-Criticality Systems (MCS) at all levels in the software / hardware stack and crucially the interfaces between them.

The workshop will promote lively interaction, cross-fertilization of ideas, synergies, and closer collaboration across the breadth of the real-time community, as well as attracting industrialists from the aerospace, automotive, and other industries with a specific interest in MCS.

WMC aims to promote a holistic approach to solving the problems of MCS. The scope of the workshop will cover all real-time aspects of MCS, including but not limited to:

  • Task and system models for MCS on singlecore, multicore and manycore platforms.
  • Scheduling schemes and analyses for MCS, including the integration of appropriate models of overheads and delays.
  • Run-time environments and support for MCS, including data exchange and synchronization across criticality levels, and issues relating to consistency of the criticality mode.
  • Analysis of worst-case execution times (WCET) relating to MCS on multicore and manycore platforms, including cache-related pre-emption and migration delays.
  • Certification issues of MCS on multicore and many-core platforms.
  • Mixed-criticality communication mechanisms and analysis, including Network-on-Chip support.
  • Probabilistic analysis techniques for MCS.
  • Security aspects only as they affect real-time behaviors of MCS.

Program Chairs

Steering Committee